Posts tagged as can

Tower Semiconductor Signs Memorandum of Understanding to Significantly Improve Its Balance Sheet and Financial Position

Will Reduce Debt by $250 Million, Increase Shareholders’ Equity by $250 Million and Improve Future Cash Flow and Financial Results...

Imagination Technologies Extends Relationship with International Electronics Systems Company with Significant Multi-year Licensing Deal

Imagination Technologies reports that, further to its announcement on 6th July 2007 of an initial license agreement with an international electronics ...

A FPGA-Based Solution for Enforcing Dependability and Timeliness in CAN

This paper identifies a fundamental set of shortcomings of the standard CAN protocol and shows how the problem has been tacked in the implementation o...

Sidense Chosen One of Canada's Companies to Watch in the 2008 Deloitte Technology Fast 50 Awards

Sidense, the leading developer of Logic Non-Volatile Memory (LNVM) IP cores, today announced that it has won a Companies-to-Watch Award, one of four s...

No nanoelectronics technology can replace CMOS until 2030, says TI exec

At the SAME Forum, in the Science Technological Park of Sophia Antipolis, South of France, Dennis Buss, chief scientist at TI, gave a retrospective lo...

Surrey Satellite Technology Ltd Licenses CAN Controller IP from Inicore Inc.

Inicore Inc. announced today that Surrey Satellite Technology Limited in Guildford, UK, has licensed its Controller Area Network Intellectual Property...

Arrow Electronics, Altera and National Semiconductor Launch MotionFire Motor-Control Platform to North American Customers

Launched in Europe in 2008, the MotionFire development platform is based on Altera's Cyclone® III FPGA, delivering a flexible and power-saving motor-...

Aspex Semiconductor reaches profitability - wins significant contracts

Aspex Semiconductor today announced that the company has secured a number of significant orders for its Accelera cards, Silicon Intellectual Property ...

How High-Level Synthesis Can Raise the Efficiency of Design Reuse

In this paper we present a design methodology based on high-level synthesis that allows retargeting functional IPs in the form of C++ programs to tech...

JTAG Boundary Scan Wrapper from DeFacTo

JTAG Boundary Scan Wrapper from DeFacTo...